Publications

2026

1. M. E. Akgun and A. A. Bayrakci, "A Lightweight Hardware Accelerator for Fixed-Point Least-Squares Estimation in RISC-V SoCs," 2026 8th International Congress on Human-Computer Interaction, Optimization and Robotic Applications (ICHORA), pp. 1–7, 2026.

2. E. Abdulhalik, M. E. Baytekin, G. S. Terci, A. A. Bayrakci and A. Turan, "A Modular Graph Coloring Abstraction for Register Allocation in LLVM: Design and Evaluation," 2026 8th International Congress on Human-Computer Interaction, Optimization and Robotic Applications (ICHORA), pp. 1–7, 2026.

2024

3. G. S. Terci, E. Abdulhalik, A. A. Bayrakci and B. Boz, "BitEA: BitVertex Evolutionary Algorithm to Enhance Performance for Register Allocation," IEEE Access, vol. 12, pp. 115497–115514, 2024.

4. F. Bekar and A. A. Bayrakci, "Hybrid Cost-Effective Decapsulation of Chips for Successful Laser Fault Injection," 2024 17th International Conference on Information Security and Cryptology (ISCTürkiye), pp. 1–6, 2024.

5. B. Kocausta, G. S. Terci and A. A. Bayrakci, "Parallelization of BitColor Algorithm via Multithreading and GPU for Graph Coloring," 2024 9th International Conference on Computer Science and Engineering (UBMK), pp. 1–6, 2024.

2023

6. F. N. Esirci and A. A. Bayrakci, "Delay based hardware Trojan detection exploiting spatial correlations to suppress variations," Integration, vol. 91, pp. 107–118, 2023.

7. (Best Paper Award) G. S. Terci and A. A. Bayrakci, "Integer Point Enumeration in Multi-Dimensional Geometric Objects with FPGA Acceleration," 2023 14th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1–5, 2023.

8. F. N. Esirci, H. Mutlu and A. A. Bayrakci, "FPGA Based Verification for the Difficulty of Delay Based Hardware Trojan Detection," 2023 14th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1–5, 2023.

2021

9. G. N. Erer and A. A. Bayrakci, "PLODE: Precise Logic and Delay Simulator for Structural Verilog," 2021 13th International Conference on Electrical and Electronics Engineering (ELECO), pp. 172–176, 2021.

2019

10. A. A. Bayrakci, "FPGA Based Low Cost Automatic Test Equipment for Digital Circuits," Electrica, vol. 19, no. 1, pp. 12–21, 2019.

11. M. Kocabas and A. A. Bayrakci, "Quantification of Power Based Hardware Trojan Detection Under Realistic Variations and Separation of Power Supplies," 2019 11th International Conference on Electrical and Electronics Engineering (ELECO), pp. 522–526, 2019.

12. F. N. Esirci and A. A. Bayrakci, "Acceleration of Spatial Correlation Based Hardware Trojan Detection Using Shared Grids Ratio," International Conference on Mathematical Aspects of Computer and Information Sciences, pp. 187–201, 2019.

2017

13. F. N. Esirci and A. A. Bayrakci, "Hardware Trojan detection based on correlated path delays in defiance of variations with spatial correlations," Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 163–168, 2017.

14. A. A. Bayrakci, "ELATE: Embedded low cost automatic test equipment for FPGA based testing of digital circuits," 2017 10th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1281–1285, 2017.

2016

15. A. A. Bayrakci, "Accelerated Accurate Timing Yield Estimation Based on Control Variates and Importance Sampling," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 8, pp. 2787–2798, 2016.

2015

16. A. A. Bayrakci, "Stochastic logical effort as a variation aware delay model to estimate timing yield," Integration, vol. 48, pp. 101–108, 2015.

2014

17. H. Ulutaş and A. A. Bayrakçi, "HCS12 EmumiS: Virtual HCS12 Development Tool," 2014.

2013

18. A. A. Bayrakci, "On the accuracy of Monte Carlo yield estimators," 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC), pp. 56–57, 2013.

2010

19. A. A. Bayrakçi, Fast and accurate statistical timing analysis of digital circuits for timing yield estimation based on transistor level simulations, Ph.D. dissertation, Koç University, Turkey, 2010.

20. A. A. Bayrakci, A. Demir and S. Tasiran, "Fast Monte Carlo estimation of timing yield with importance sampling and transistor-level circuit simulation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, no. 9, pp. 1328–1341, 2010.

2008

21. A. A. Bayrakci, A. Demir and S. Tasiran, "Fast Monte Carlo estimation of timing yield: Importance sampling with stochastic logical effort (ISLE)," arXiv preprint arXiv:0805.2627, 2008.

2007

22. A. A. Bayrakci and A. Akkas, "Reduced delay BCD adder," 2007 IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 266–271, 2007.