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Alp Arslan Bayrakçi, Asst. Prof.

Curriculum Vitae

Date of Birth: July 24, 1982
Email: abayrakci@gtu.edu.tr

RESEARCH INTERESTS

Digital Design, Development of Computer Aided Design (CAD) Tools for Analysis of Digital Circuits, Hardware Security, Monte Carlo Methods, Deterministic and Statistical Timing Analysis, Variation modeling, Computer Architecture.

EDUCATION

Direct Ph.D., Koc University, Istanbul
Sep 2004 -October 2010
Department: Computer Engineering
Thesis Topic: Statistical Timing Analysis of Digital Circuits

B.S.
, Middle East Technical University (METU), Ankara
Sep 2000 -June 2004
Department: Electrical and Electronics Engineering Graduated as a Honour Student Emphasis on digital electronics and computer

PUBLICATIONS

Journals (SCI):

A. A. Bayrakci, "Accelerated Accurate Timing Yield Estimation Based on Control Variates and Importance Sampling", in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.PP, no.99, pp.1-12, doi: 10.1109/TVLSI.2016.2521541, Feb. 2016 (Early Access)

A. A. Bayrakci, "Stochastic logical effort as a variation aware delay model to estimate timing yield", Integration, the VLSI Journal, Volume 48, Pages 101-108, ISSN 0167-9260, doi: 10.1016/j.vlsi.2014.07.003, January 2015

A. A. Bayrakci, Alper Demir, and Serdar Tasiran, " Fast Monte Carlo Estimation of Timing Yield With Importance Sampling and Transistor-Level Circuit Simulation", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.29, no.9, pp.1328-1341, Sept. 2010

(Emerging SCI):

A. A. Bayrakci, "FPGA Based Low Cost Automatic Test Equipment for Digital Circuits", Electrica 19.1, 2019: 12-21.


Conference Proceedings:

F.N. Esirci and A. A. Bayrakci, "Acceleration of Spatial Correlation Based Hardware Trojan Detection Using Shared Grids Ratio." In International Conference on Mathematical Aspects of Computer and Information Sciences, pp. 187-201. Springer, Cham, 2019.

M. Kocabas and A. A. Bayrakci, "Quantification of Power Based Hardware Trojan Detection Under Realistic Variations and Separation of Power Supplies." In 2019 11th International Conference on Electrical and Electronics Engineering (ELECO), pp. 522-526. IEEE, 2019.

A. A. Bayrakci, "ELATE: Embedded low cost automatic test equipment for FPGA based testing of digital circuits." In 2017 10th International Conference on Electrical and Electronics Engineering (ELECO), pp. 1281-1285. IEEE, 2017.

F. N. Esirci, A. A. Bayrakci, "Hardware Trojan Detection Based on Correlated Path Delays in Defiance of Variations with Spatial Correlations", Design, Automation and Test in Europe (DATE), March 2017"

Alp Arslan Bayrakci, "On the accuracy of Monte Carlo yield estimators," IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC 2013), pp.56,57, 7-9 Oct. 2013

Alp Arslan Bayrakci, Ahmet Akkas. "Reduced Delay BCD Adder". IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP 2007). Volume-Issue: 9-11, July 2007, Page(s):266-271